Differential preamplifier network for a sample-data motor speed control



April l, 1969 R. L. JAMES DIFFERENTIAL PREAMPL-lFIBR NETWORK FOR ASAMPLEDATA MOTOR SPEED CONTROL Sheet l Filed sept. 23,. 1965 INVENTORHUBERT JAMES April 1, 1969 R. L. JAMES y DIFFERENTIAL PREAMPLIFIERNETWORK FORA A v SAMPLE-DATA MOTOR SEEED CONTROL Filed Sep,. 25, 1965Sheet mx m I.

INVENTOR.

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MH. IL ll// R. L. JAMES Aprill, 1969 DIFFERENTIAL PREAMPLIFYIER NETWORKFOR A SAMPLE-DATA MOTOR SPEED CONTROL Sheet Filed Sept. 25, 1965 Ft.l L.JAMES April 1, 1969 3,436,636

DIFFERENTIAL PIEAMPLIFIEH NETWORK FOR A SAMPLE-DATA MOTOR SPEED CONTROLFiled Sept. V25. 1965 I sheet 4 of 4 I PULSE WIDTH MODULATED SERVOWAVEFORMS I REFERENCE' A A PULSE n TRICISTOR |30 A -A CONTROL PULSES yB' B mslCNAL r- SAMPLING B B PULSE JETRIGISTOR |49 C, C,

CONTROL PULSES xz RATE a. HOLD A A SAMPLINC "T V PULSE C C .n UNUUNCTIONUJT FIRINC POINTS g'gfr g ZERO SIGNAL INPUT CONTROL l Y''TMQ'QUMOUUTTP'R H ourp VOLTAGES I: RIDER VOLTAGES Z SIGNAL OFW m-rmlsrons gn,Blfs m's'fum l 'l I 9920UTPUT T l Y-zERoslCNALINPUT TRANSISTOR x... x

PULSES Y-MAxlMuM ourPur Z Z y z-OTHER ourPUT FOR SIGNAL oFY" OUTPUT OFm. RATE lHOLD NETWORK 32 FIG. 4

IN VEN TOR ROBE/QT L. JAMES United States Patent Ofi 3,436,636DIFFERENTIAL PREAMPLIFIER NETWORK FOR A SAMPLE-DATA MOTOR SPEED CONTROLRobert L. James, Bloomfield, NJ., assignor to The Bendix Corporation, acorporation of Delaware Filed Sept. 23, 1965, Ser. No. 489,627 Int. Cl.H021 5 00, 7/00; G05b 1 1/00 U.S. Cl. 318-331 4 Claims ABSTRACT OF THEDISCLOSURE The present invention is directed to the novel preamplifierand adder network 16 and 34 described and claimed herein with referenceto FIGURE 2. The novel pulse width modulated servo drive control systemdescribed herein with reference to FIGURES 1, 2, 3, and 4 is the subjectmatter of a U.S. application Ser. No. 484,547 filed Sept. 2, 1965 byRobert L. James and Harold Moreines. The novel method of controlling adirect current motor described herein is the subject matter of a U.S.application Ser. No. 484,528 filed Sept. 2, 1965 by Harold Moreines; thenovel signal sampler network 18 of FIGURE 2 is the subject matter of aU.S. application Ser. No. 489,640 filed Sept. 23, 1965 by Robert L..James; the novel pulse width modulator network 20 of FIGURE 2 is thesubject matter of a U.S. application Ser. No. 491,326 filed Sept. 29,1965 by Robert L. James; the novel two channel trigistor output stagemotor control system 20-22 of FIGURE 2 is the subject matter of a U.S.application Ser. No. 491,585 filed Sept. 30, 1965 by Robert L. James,now U.S. Patent No. 3,398,345, granted Aug. 20, 1968; the novel timingnetwork of FIGURE 3 is the subject matter of a U.S. application Ser. No.698,564 filed Ian. 17, 1968 as a division of U.S. application Ser. No.496,428 filed Oct. 15, 1965 by Robert L. James; the novel timing networkfor the modulated servo drive control system of FIGURES 2 and 3 is thesubject matter of the U.S. `application Ser. No. 496,428; and the novelrate feedback loop network 14 of FIGURE to The Bendix Corporation,described and claimed herein.

This invention relates to a braically added to the direct current servosignal input to dampen the control of the motor.

In the direct current motor control system with which the preamplifiernetwork of the present invention is particularly designed for use, thereis provided a pulse width 3,436,636 Patented Apr. 1, 1969 ice modulatornetwork periodically effected through a signal sampler network by dualvoltage outputs from the preamplifier network of the present inventionin response to the amplitude and polarity of a signal voltage from adirect current signal source and said preamplifier including an addernetwork to algebraically combine with thel direct current voltage signala feedback voltage acting in opposing relation with the signal voltageso as to dampen the control of the direct current motor operated by thepulse width modulator network.

An object of the invention is to provide such a novel preamplifiernetwork of simplicity in design and of minimum number of parts foreffecting impedance matching. signal inverting and the supply ofquiescent biasing Voltages at the outputs of the dual voltage channelpreamplifier.

Another object of the invention is to provide with such novelpreamplifier network a resistance adder network. to combine a directcurrent control voltage signal with a direct current rate feedbackvoltage signal proportional to the speed of rotation of the controlledmotor.

Another object of the invention is to provide a dual channel directcurrent preamplifier of low voltage gain (large local feedback)providing impedance matching to a signal sampler network, phaseinversion to effect output voltage signals at the dual outputs of thepreamplifier of opposite phase as well as effect high direct currentbias levels need for operation of a pulse generator network for drivingthe controlled direct current motor'.

Another object of the invention is to provide a preamplifier networkincluding first and second current control devices acting in oppositesenses in response to a direct current signal voltage to control biasingvoltages applied at a pair of output conductors in opposite senses so asto increase the voltage at one output conductor while decreasing thevoltage at the other output conductor dependent upon the amplitude andpolarity of the input control voltage.

Another object of the invention is to provide means to combine inopposing relation a direct current command voltage with a direct currentfeedback voltage proportional to the rate of rotation of a controlledmotor so as to effect an error voltage to control the biasing voltages.

These and other objects and features of the invention in the novelpreamplifier network have been pointed out in the following descriptionas applied to a pulse width modulated servo drive control system shownin the accompanying drawings and in which the novel preamplifier networkof the present invention is particularly adapted for use. It is to beunderstood, however, that the drawings are for the purpose ofillustration only and are not a definition of the limits of theinvention. Reference is to be had to the appended claims for thispurpose.

In the drawings:

FIGURE 1 is a schematic block diagram illustrating a pulse widthmodulated servo drive control system in which the novel preamplifiernetwork embodying the invention is particularly adapted for use.

FIGURE 2 is a wiring diagram of the forward loop network of the servodrive control system of FIGURE 1 showing a wiring diagram of thepreamplifier network including an adder network which embodies thepresent invention as applied in the operative arrangement shown.

FIGURE 3 is a wiring diagram of the timing network and rate feedbackloop network of the servo drive control system of FIGURE l.

FIGURE 4 is a graphical illustration of the wave forms effected in theelectrical networks of FIGURES 2 and 3 at the designated points.

The pulse width modulated servo drive control system illustrates anoperative arrangement in which the novel preamplifier network of thepresent invention may be responsive to a direct current signal voltage`and 'rate feedback voltage to provide control of a direct current motorfor positioning with extreme accuracy a device such as a telescope in astar tracking system.

Referring to the drawing of FIGURE l, the system includes a forwrad loopnetwork of a pulse width modulator type indicated generally by thenumeral for controlling a direct current motor vactuator 12 including arate feedback loop network 14, together with `a timing network 15 forcontrolling the forward and rate feedback networks 10 and 14.

Included in the forward loop network 10 is a preamplifier network 16embodying the present invention to effect impedance matching, a signalinverting and provide quiescent voltage biasing for a signal samplernetwork 18. The signal sampler network 18 samples the signal output fromthe preamplifier 16 superimposed on the quiescent bias output of thepreamplifier network 16. The pulse width modulator 20 converts theamplitude modulated output of the signal sampler 18 to a constantamplitude recurring pulse having a pulse width proportional to theamplitude of the input signal.

An output stage amplifier network 22 delivers these pulses applied bythe pulse width modulator network 20 to the direct current motoractuator 12. As hereinafter explained, the timing network 15 may includea relaxation oscillator network 24 and sampling Apulse generator network26 to supply required timing and sampling pulses to the motor ratevoltage sampler network and rate hold network of the rate feedback loopnetwork 14 and to the pulse width modulator network 20 and signalsampler network 18 of the forward loop network 10.

In the rate feedback loop network 14 there is -provided the motor` ratevoltage sampler network 28 which samples the back electr-omotive forcesat the direct current actuator motor 12 at regular recurring timesbetween power driving pulses applied to the actuator motor 12.

A variable amplitude fixed duration output of the motor voltage sampler28 is amplified by a rate pulse amplifier 30 and supplied to a rate holdcircuit 32 which serves to hold the amplitude of the short durationpulse received from the rate hold amplifier 30 and delivers an equalamplitude direct cunrent Voltage at the adder network 34 to the input ofthe preamplifier 16 of the forward loop network 10 of the servo controlsystem-between said regular recurring times and thereby complete therate feedback loop network 14.

Referring now to FIGURES 2 and 3, the electrical network of the severalcomponents of the system of FIG- URE 1 are shown in detail. A directcurrent signal source of conventional type and indicated by the numeral35 supplies a direct current command voltage signal of variableamplitude and selected polarity across the conductors 37 and 39. Theresistance added network 34 combines this voltage signal with the followup or rate feedback signal Voltage of an amplitude variable directlywith the velocity of the motor 12 and supplied through a conductor 41from the output of the rate feedback loop network 14 so Eas to provide adirect current error voltage signal (obtained from subtraction of theoommand and rate feedback signals) applied through the preamplifier 16to the signal sampler circuit 18 and thereby to the pulse widthmodulator 20 and output stage amplifier 22 to provide signal pulsesacross a control or load winding 42 of the actuator motor 12 whichsignal pulses have a width variable directly with the amplitude of thevoltage of the direct current error signal. The preamplifier 16 is a twochannel direct current amplifier including transistors 43, 45 and 47 oflow voltage gain (large local feedback) so as to provide impedancematching to the signal sampler circuit 18 and a phase inversion toselectively provide two output signals at lines 49 and 51 of oppositephase dependent upon the polarity of the input command voltage signal atconductor 37 and thereby effect the high direct current bias levelsneeded for the unijunction transistor pulse circuits of the pulse widthmodulator 20.

In the operation Iof the preamplifier 16 it will be seen that upon apositive signal being applied to thc input conductor 37 and thereby tothe base of the transistor 45, the transistor 45 will be rendered moreconductive and thus the collector output at the line 49 becomes lesspositive. Conversely the positive signal supplied through the inputconductor 37 will be applied to the base of the transistor 43 which willcause the transistor 43 to become more conductive causing the collectoroutput coupled through a resistor 46 to the base of the transistor 47 tobecome less positive and the transistor 47 less conductive so that theoutput line 51 from the collector of the transistor 47 becomes morepositive. Thus upon a positive signal being applied at the inputconductor 37, the output line 49 of the transistor 45 becomes lesspositive while the output line 51 from the transistor 47 becomes morepositive.

If the operating conditions are reversed and a negative direct currentsignal is applied through the conductor 37, it will be seen that thenegative bias then applied to the base of the transistor 45 will causethe transistor 45 to become less conductive and the output line 49therefrom more positive and conversely the negative signal applied tothe base of the transistor 43 will render the transistor 43 lessconductive and thereby the transistor 47 coupled thereto more conductive:so that the output line 51 leading from the collector of the transistor47 will become less positive.

Of course, upon a zero signal being applied to the input conductor 37,the positive bias applied by the battery 74 to the collector of thetransistor 45 and to the collector of the transistor 47 will provideoutput signals at the lines 49 and 51 of equal positive value. Theoutput lines 49 and 51 lead from the preamplifier network 16 into thesignal sampler network 18.

The signal sampler network 18 includes balanced diode bridges 53 and5S', Zener diodes 57 and 59 and secondary windings `61 and 63 of a pulsesampling transformer 65 having a primary winding 68 with conductors 69and 71 leading to the forward loop network 10 of FIGURE 2 from thesampling pulse generator 26 of FIGURE 3 so as tu control the. operationof the signal sampler network 18, as hereinafter explained.

The lines 49 and 51 apply output signals of opposite phase from thepreamplifier 16 dependent upon the polarity of the command signalvoltage applied at input conductor 37. The balanced diode -bridges 53and 55 are so controlled as to rapidly connect and disconnect theoutputs of the preamplifier transistors 45 and 47 to pulse generatorcharging capacitors 71 and 73 of the pulse width modulator 20. Thisaction establishes initial charges on the capacitors 71 and 73 bearinglinear relationship to the signal inputs at conductors 49 and 51.

T-hese initial charges on the capacitors 71 and 73 determine the time atwhich relatively slowly rising ramp voltages applied at control emittersand 81 of the unijunction switching transistors 82 and 83 reach thethreshold firing levels of the unijunction switching transistors 82 and83.

The `foregoing is effected by the amplitude of the signal inputs atconductors 49 and 51 and also by the continued charging of thecapacitors 71 and 73 from a source. of direct current or battery 74having a negative terminal connected to ground and a positive terminalconnected through a conductor 75, diode 76 and high resistances 77 and78 respectively to one plate of each of the capacitors 71 and 73 withthe opposite plate of said capacitors connected to ground through aconductor 79.

Thus the ramp voltages applied at the control emitters 80 and 81determine the time of the output pulses supplied through Itheunijunction transistors 82 and 83 to the respective primary windings 85and 87 of coupling transformers 89 and 91 having secondary windings 93and 95 which in turn serve to control silicon controlled rectifiers ortrigistors 97 and 99. These output pulses are used to turn off thetrigistors 97 and 99 which previously had been turned on by the actionof reference pulse A just before initial charges were placed on thecapacitors 71 and 73 by the action of the sampling pulse B.

The outputs of the trigistors 97 and 99 therefore are pulses having awidth with the amplitude of are periodically turned on at a set time andturned off at a later time depending on the amplitude of the inputsignal error voltage applied through the adder circuit 34 bythe commandsignal voltage at the conductor 37 as modified by the rate feedbacksignal voltage applied through conductor 41.

The two channel circuitry of the input lines of the signal samplercircuit 18 serves to provide opera- 103 for minimizing radio frequencyinterference generation.

A resistance loading 105 connected across the single loading resistance105. Future system testings may relax this requirement of shorttransient settling time, allowing transistors of lower voltage ratings.

Also the advent of turn off type control rectifiers with high transientratings may serve to eliminate simply driving the motor 12 directly withturn off type control rectifiers replacing the trigistors 97 and 99.

t Some additional radio frequency interference filtering d samplingpulse generator 26 serve to generate pulses needed for the abovedescribed pulse width modulator 20.

The relaxation oscillator 24 (see FIGURE 3) includes a unijunctiontransistor 111 having base elements connected t-hrough suitableresistors 112 and 114 across le battery 74 by a conductor 115 leading tothe positive terminal of the battery 74 and a grounded conductor 117leading to the negative terminal of the battery 74. The unijunctiontransistor 111 further includes a control emitter 118 coupled through acapacitor 119 to the grounded conductor 117 and connected through aresistor 120 and conductor 121 to the cathode of a diode 122 having ananode element connected through the conductor 115 to the positiveterminal of the battery 74. The charging capacitor 119 is periodicallycharged to the threshold firing level of the unijunction transistor 111at predetermined 6 time intervals dependent upon the selected values ofthe resistor and capacitor 119.

The arrangement is such as to provide output reference pulses A, asshown graphically at I of FIGURE 4, at predetermined timed intervalsapplied through an output cond-uctor 123 to the base of a controltransistor 125 of the pulse width modulator 20, and through a conductor124 and positive going diode 122 to the gating terminal 126 of a siliconcontrolled rectifier or trigistor 130 of the network 26, as showngraphically at II of FIGURE 4, so as to provide at the output of thetrigistor 130 signal sampling pulses B, as shown at III of FIGURE 4 andapplied through conductors 69 and 71 across the primary winding 68 ofthe pulse sampling transformer 65.

In addition to the output reference pulses A applied through theconductor 123, such reference pulses are also applied through a primarywinding 132 of a transformer 134 having secondary windings 136 and 138.The primary winding 132 is connected across the resistor 114 and has oneterminal connected to the output conductor 123 and an opposite terminalconnected to the grounded conductor 117.

The secondary winding 136, as shown by FIGURE 3, has one terminalconnected through a conductor 139 to the cathode element of the siliconcontrolled rectifier or trigistor 99 while the opposite terminal of thesecondary winding 136 is connected through a conductor 141, resistor 142and a positive going diode 144 to the gating terminal 145 of thetrigistor 99, as shown by FIGURE 2, so as to turn ori the trigistor 99upon the output reference pulse A being applied through the primarywinding 132 and thereby induced in the secondary winding 136 of thetransformer 134.

Similarly, the output pulse A applied through the conductor 123 andthereby through a conductor 147, shown in FIGURE 2, and the positivegoing diode 149 to the gating terminal 151 of the trigistor 97 serves tolikewise turn on such trigistor 97.

Both the trigistor 97 and the trigistor 99 are turned off respectivelyby the signal pulses applied in the secondary windings 93 and 95 throughnegative going diodes 152 and 153 to the gating terminals 151 and 145,respectively, of the trigistors 97 and 99. The signals induced in thesecondary windings 93 and 95 correspond with the amplitude of the directcurrent input signal voltage supplied at conductors 49 and 51, asheretofore explained.

The respective outputs from the trigistor 97 or 99, as the case may be,is in turn applied, respectively, to the bases of the transistor 101 or103 of the output stage amplifier 22 and thereby across the load winding42 of the motor 12.

In this connection it may be noted that the transistor 101 has anemitter connected through conductor 75 to the positive terminal of thebattery 74 and in response to the output signal from the trigistor 97serves to control the energization of the load winding 42 of the motor12 from the source of electrical energy or battery 74. On the otherhand, the transistor 103 is response to the singal output of thetrigistor 99 serves to control the energizing current to the loadwinding 42 of the motor 12 applied from -a second source of electricalenergy or battery 164. The battery 164 has a negative terminal connectedthrough a conductor 165 to the emitter of the transistors 103 while thepositive terminal of the battery 164 is connected to ground through aconductor 166.

In the aforenoted arrangement, the collector of the amplifier transistor101 is connected through a positive going diode 168 to the conductor 104leading to the vload winding 42 of the motor 12 while the collector ofthe amplifier transistor 103 is connected through a negative going diode169 to the conductor 104 leading to the load winding 42 of the motor 12.It will be seen then that the transistor 101 controls energization inone sense of the load winding 42 from the -battery 74 so as to effectrotation of the motor 12 in one direction while the transistor 103controls energization of the load winding 42 in an opposite sense `fromthe battery 164 so as to effect rotation of the motor 12 in an oppositedirection.

The output pulses applied across the conductors 104 and 203 to the loadwinding 42 of the motor 12 will be in a polarity sense dependent uponwhether the direct current command signal applied at the input 37 is ofa positive or negative polarity and these output pulses will be at arepetition rate dependent upon the predetermined time interval of thereference pulses A supplied by the relaxation oscillator 15 :through theaction of the unijunctionl control transistor 111, as heretoforeexplained. Moreover, the duration of these 4motor control pulses will bedependent upon the amplitude of the direct current command signalapplied'through the input conductor 37. 1

Thus the reference pulse A sets the repetition rate of the motor drivepulses applied through the pulse width modulator and serves as a timingreference for all circuit functions. p

The pulse generators or unijunction switching transistors 82 and 83 ofthe pulse width modulator 20 are reset for the start of each new cycleby the `pulse Av applied through the conductor 123 to the base of thetransistor 125 which serves to turn on the transistor 125 for theduration of the pulse A whereupon the transistor 125 acts to dischargethe capacitors 71 and 73 through two disconnect diodes 117 and 119. Thisresetting operation is completed just prior to sampl-ing the directcurrent signal for initially charging the capacitors 71 and 73.

Besides the reference pulse A, shown graphic-ally at I and II of FIGURE4, there are generated two sampling pulses of controlled duration fromthe occurrence of the pulse A. Similar circuitry is used for both of thesampling pulses. One of the pulses is a sampling pulse B, showngraphically at III of FIGURE 4 for energizing the signal sampler network18 of FIGURE 2.

This sampling pulse B is generated by the action of the trigistor orsilicon controlled rectifier 130, unijunction switching transistor 174and transistor 176 of FIGURE 3.

Pulse A applied by conductor 123 to a base of transistor 176 serves toreset a timing circuit including resistor 178 and capacitor 180 for theunijunction transistor 174. The resistance capacitor timing circuit178-180 effectively controls the emitter of the unijunction transistor174 so as to produce at the output thereof a pulse B', shown graphicallyat II -of FIGURE 4, a predetermined time later than the occurrence ofpulse A (for example, two milliseconds) due to a charging of the resetcapacitor 180 up to the tiring threshold voltage of the unijunctiontransistor 174. This pulse B (shown graphically in II of FIGURE 4) isthen applied through a primary winding 183 of a coupling transformer 185in the output of the unijunction transistor 174. The pulse B is inducedin a secondary winding 186 of the transformer 1-85 and applied therebythrough a negati-ve going diode 188 to the gating terminal 126 so as toturn off the silicon controlled rectifier or trigistor 130- (trigistor130 having been previously turned on by the action of pulse A appliedthrough the conductor 12-4 and the positive going diode 122) The outputpulse B of the trigistor 130* (FIGURE 3) appearing in the primarywinding 68 of the transformer 65 (FIGURE 2) is then a preciselycontrolled two millisecond -rectangular pulse B, as shown graphically atIII of FIGURE 4, starting at the end of pulse A and ending at thebeginning of pulse B', as shown graphically at II of FIGURE 4.

T-he other sampling pulse heretofore referred to and denoted as pulse C,shown graphically at V of FIGURE 4, is generated by circuitry, as shownin FIIGU'URE 3, including transistor 245, unijunction transistor 247 andtrigistor or silicon controlled rectifier 249, as hereinafter explained.

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The pulse C appears at the output `of trigistor 249 which is turned onby a pulse C1 and turned off by pulse A, as shown graphically at IV andV of FIGURE 4.

In effecting the output pulse C1, the reference pulse A at conductor 123is applied through resistor 244 so as to enter the base of thedischarging transistor 245 to serve to reset a timing circuit includingresistor 248 and capacitor 250 for the unijunction transistor 247. Theresistance capacitor timing circuit 24S-250 effectively controls theemitter of the unijunction transistor 247 so as to produce at the outputlthereof a pulse C1, shown graphically at IV of FIGURE 4, apredetermined time interval after the occurrence of the immediatelypreceding reference pulse A due to a charging of the reset capacitor 250up to the firing threshold voltage of the unijunction transistor 247,.This pulse C1 (shown graphically in IV of FIG-URE 4) is then appliedthrough a conductor 251 and resistor 252 to the gating terminal of thesilicon controlled rectifier or trigistor 249 to turn on the trigis-torV24S?.

Thereafter, a reference pulse -A induced in the secondary winding 13-8of the transformer134 and applied through a conductor 252 and negativegoing diodev253 andvresistor4 255 to the gating terminal of the siliconcontrolled rectifier or trigistor 249 is effective to turn off thetrigistor 249 a predetermined time later than the occurrence of thepulse C1. rPhe pulse C (shown graphically in V of FIGURE 4) at theoutput of the trigistor 249 is then a precisely controlled rectangularpulse C, as shown graphically in V of FIGURE 4, starting at the end ofpulse C1 and ending at the beginning of pulse A', as shown graphicallyat V of FIGURE 4.

The .pulse C, shown graphically at V of FIGURE 4, is applied to aprimary winding 261 of a coupling transformer 2613 having outputsecondary windings 265 and 266. Winding 265 is connected throughconductors 271 to control an inch transistor chopper device 273 in therate hold network 32 of the rate feedback loop network 14 while theoutput winding 266 of the coupling transformer 263 is connected throughconductors 275 to control the operation of an inch transistor chopperdevice 277 of a rate voltage sampler network 28 of the rate feedbackloop network 14. The output of the rate voltage sampler network 28 isconnected to the input of the rate pulse amplifier network 30 while therate hold circuit 32 has an input connected at the output of the ratepulse ampli'lier 30, shown in FIGURE 3. The rate pulse amplifier network30 includes a field effect transistor 281 connected to the output of theinch transistor chopper device 277 as well as transistor amplifiers 283and 285 and an output transistor 287 having a resistor 286 connectedbetween a grounded conductor 288 and an emitter of the transistor 287'with an output conductor 289 and the grounded conductor 288 beingcoupled across the inch transistor chopper device 273 by a couplingcapacitor 291. A conductor 41 leads from the output of the chopperdevice 273 to the adder circuit 34 and thereby to the input of thepreamplifier 16.

OPERATION In explanation of the operation of the forward loop network10, the direct current command signal applied through the conductor 37will be selectively effective, dependent upon the polarity thereof, tocause the transistor 45 or the transistors `43-47, as heretoforeexplained, to apply a more positive control signal through one of theoutput lines 49 or 51 and a less positive control signal through theother of the output lines 49 or 51.

The positive control signal is then `applied by the output lines `49 and51 through the positive going diodes of the balanced bridges 53 and 55and through lines leading from one arrn thereof to the secondarywindings 61 and 63 of the pulse sampling transformer 65 and thereby tothel cathode element of the Zener diodes 57 and 59 having an anodeelement connected to an opposite arm of the respective bridges l53 and55. The Zener diodes 57 and 59 have a reverse current breakdowncharacterisflow of current tic such as to permit a reverse flow ofcurrent there through upon the sampling pulse B being induced in thesecondary windings 61 and y63. The control signal pulse is applied thenfrom the lines 49 and 51 through the bridges 53 `and 55 to the windings61 and 63 and upon the reverse current breakdown of the Zener diodes 57and 59 effected by the sampler pulse B, the control signal pulse isapplied at the respective output lines 66 and 67, with the samplingpulse B being cancelled out at the opposite input and output lines ofthe balanced bridges 53 and 55.

The breakdown characteristic of the Zener diodes 57 and 59 issufficiently low however as to prevent a reverse there through in theabsence of the sarnt'hat in the latter case no positive current How iselfected at either output conductor 66 or 67. On the other hand upon thesampling pulse B` being applied to the secondary windings 61 and 63, theZener diodes 57 and 59 permit the flow of positive current through theoutput conductors 66 and 67 to eect a charging of the capacitor 71 and73 during the interval that the sampling pulse B is applied through theprimary winding 67 of the pulse sampling transformer 65.

In the event a zero control signal is applied to the input conductors 37then upon the application of the sampling pulse the current iiowelfected at the output conductors 66 and 67 by the battery 74 will 'beof an equal positive value. However, upon the control signal applied atthe conductor 37 being of a positive Value then the output signalcurrent applied at the output conductor 66 will have a less positivevalue while the output current applied at the output conductor 67 willhave a more positive value. Conversely, upon the input signal applied atthe conductor 37 -being of a negative value then the output signalapplied at the output conductor `66 will have a greater positive valuewhile the output current applied at the output conductor 67 will have alesser positive value.

The output conductors 66 and 67 thus provide a tlow of charging currentto the respective capacitors 71 and 73 during the interval that thesampling `pulse B is applied through the pulse sampling transformer 65.

Further, the pulse A, as shown graphically at II and III of FIGURE 4, iseffective at the initiation of the sampling pulse B to act through theconductor 123 on the base of the transistor 125 so as to render thetransistor 125 conductive at the start of the signal sampling pulse Bwhile at the sarne time the pulse A acts through conductor 147 to turnon the trigistor 97 and through conductor 141 to turn on the trigistor99.

The transistor 125 then provides a discharge path for the capacitor 71through the diode 117 and other discharge path for the capacitor 73through the diode 119. Thereafter, the charging cycle for the capacitors71 and 73 is effective for the period of the signal sampling pulse B andthe charge thus applied to the capacitors 71 and 73 upon reaching thering level of the unijunction transistors 82 and 83 acts to render thesame conductive.

Thus, for example, as shown graphically at VI and VII of FIGURE 4, upona zero signal input being applied at the conductor 37, the controlvoltage applied at the emitters of the unijunction transistors 82 and 83will be of equal value and of a value indicated by the line X of thegraph VI resulting in the transistors 82 and 83 both firing at the sametime to apply a control pulse in the windings 93 and 95 at the same timeto turn oif the trigistors 97 and 99 as indicated graphically at VII ofFIGURE 4 by X. Since the outputs then of the trigistors 97 and 99 Willbe of equal value at the same time and of opposite polarity, thepositive collector output applied through the transistor 101 by thebattery 74 will pass directly through diodes 168 and 169 and in turnthrough the transistor 103 to the negative terminal of the battery 164returning through the grounded connection 166 to the negative terminalof the battery 74.

However, upon a positive or negative direct current signal voltage beingapplied through the input conductor pling pulse B so 37, the chargeapplied to one or the other of the capacitors 71 and 73 will Ibe greaterso that the control voltage ap- Iplied to the emitter of one or theother of the transistors 82 or 83 will cause the unijunction transistor82 or 83 controlled by the capacitor 71 or 73 having the greaterpositive charge applied thereto to fire at point Z, as indicatedgraphically at VI of FIGURE 4, while the other of the unijunctiontransistors 82 or 83 controlled fby the capacitor 71 or 73 having thelesser positive charge applied thereto will lire at the point Y, as thecharge applied to the latter controlling capacitor is built up by thecharging current applied through resistor 77 or 78 by the battery 74 tothe critical tiring level of the unijunction transistor, as indicated atVI of FIGURE 4. This action will then cause the transistor 82 or 83controlled' by the greater charged capacitor 71 or 73 to tirst apply acontrolling pulse to the primary winding 85 or 87 acting throughcoupling transformer 89 or 91 to turn olf the trigistors 97 or 99controlled thereby at the point Z, while the last to iire unijunctiontransistor 82 or 83 controlled by the lesser charged capacitor willapply a pulse through the coupling transformer 89 or 91 acting to turnotf the trigistor 97 or 99 at the point Y upon the charge on suchcapacitor increasing to the ring level of the other unijunctiontransistor thus acting to apply an energizing pulse for the motor 12through the transistor 101 or 103, as the case may be, of the duration Yindicated graphically in FIGURE 4 by VII.

This motor energizing pulse will be applied across output lines 104 and79 and will be for a duration variable with the amplitude of the inputcommand signal 37. In this operation it will be seen that the pulsewidth modulator 20 in eifect converts the amplitude modulated output ofthe signal sampler 18 to a constant amplitude recurring pulse in theload winding 42 of the motor 12 having a pulse width proportional to theamplitude of the input signal applied to the input conductor 37. Theunijunction transistors 82 or 83 are thereby selectively operable in thesense that one precedes the other dependent upon the polarity of theinput command signal applied to the conductor 37 This input commandsignal in turn controls the trigistor 97 or 99, as the case may be, toeffect the constant amplitude pulse of the width proportional to theamplitude of the input signal at the output of the transistor 101 or 103which in turn delivers these pulses to the load winding 42 of the directcurrent motor actuator 12.

The pulse thus applied to the load winding 42 of the motor 12 will causerotation of the motor in one direction when eifected through thetransistor 101 and in an opposite direction when atfected through thetransistor 103 which action is in turn controlled *by the polarity ofthe direct current command signal applied through the conductor 37.

Furthermore, during the between each energizing pulse ing 42 of themotor 12, there will be generated across the Winding 42 a backelectromotive force of a polarity dependent upon the direction ofrotation of the motor effected by the command signal applied through theconductor 37 and of an amplitude variable with the speed of rotation ofmotor 12.

This sampled armature voltage is applied through the rate feedback loopnetwork 14, as hereinafter explained, to the adder network 34 as adirect current signal of a polarity acting in opposition to the commandsignal applied through the conductor 37 to provide a desired dampingaction on the control of the mtor 12.

In explanation of the rate feedback loop 14, it will be noted that thereis provided the inch transistor chopper device 277 in the rate voltagesampler circuit 28 which acts with each sampling pulse C to sample thevoltage across the motor load winding 42 applied through the conductor201 and grounded conductor 203 when the pulse drive voltage appliedacross the conductors 104 and intervals of interruption applied to theload windhold output voltage, is

1 1 79 to the load winding 42 of the motor 12 drops to zero near the endof the drive pulse cycle.

It will be noted that, as shown graphically at III and V of FIGURE 4,the rate and hold sampling pulse C immediately precedes in time thesignal sampling pulse B and at the time of the sampling pulse C (after amotor turn off transient has settled out) the motor output voltageapplied across the lines 201 and 203 is due to the speed of rotationonly of the motor 12 so that `the sample signal from this motor voltageis a rate signal (i.e., amplitude of the sample pulse is proportional tothe speed of rotation of the motor 12 which is in turn dependent on theamplitude of the command signal voltage at input 37 while its sign isdependent on the direction of rotation of the motor 12 which is in turndependent on the polarity of the command si-gnal voltage at input 37).

The inch device 277 has a very low coupling between its energizing pulseapplied across the lines 275 and the signal applied across the lines 201and 203. The arrangement is such as to require no matched components andprovides simplicity and small size.

The rate pulse amplifier 30 includes a field effect transistor 281 forgain and high input impedance, two common emitter transistor stages 2183and 285 for gain and a transistor 287 providing an emitter followeroutput and a low output impedance to the rate hold network 32. Thetransistor stages 285 and 287 are coupled l.by a resistance-capacitancenetwork 284 to avoid the drift `which would occur had a direct coupleddirect current amplifier arrangement been used.

A field effect input stage 281, by requiring no bias connections at itsinput, allows direct coupling to the output of the inch transistorchopper device 277. If instead, bias current were supplied to this inputcircuit with direct coupling to the chopper device 277, operation of thechopper device would alter the bias circuit and prod-uce pulse outputseven upon a zero signal voltage bein-g sampled. Direct coupling not onlysaves a capacitor (reducing circuit complexity, cost and size), `buteliminates the slope-off and back swing distortion produced by aresistance-capacitance coupling of pulse amplifier circuits..

To minimize slope-off and back swing distortion, a time constant of theresistance-capacitance coupling elements must be long compared to thepulse duration.

`Operation of the output hold circuit 32 is as follows: the inchtransistor chopper device i273 in the hold circuit 32 is closed by thesampling pulse C, shown graphically at V of FIGURE 4, and which isidentical to that effective to close the inch transistor chopper device277 provided inthe rate voltage sampler network 28.

The closing of the chopper device 273 connects the coupling capacitor291 immediately across the output of the rate hold network 32 for theinterval of the pulse C, as shown graphically at VII of FIGURE 4. Thus,an amplified sample signal pulse appears at the output of emitterfollower 287 at the same time that the inch transistor chopper device273 connects the capacitor 291 across the output of the emitter followertransistor 287.

The capacitor'291 quickly charges up to the quiescent direct currentvoltage and the amplified sample signal pulse, with a short timeconstant due to the low output impedance of the emitter followerresistor 286` and the low saturated resistance of the inch transistorchopper device 273.

When the pulse C is terminated, the inch7 transistor chopper device 273opens and the voltage across it or the a series combination of thevoltage across the capacitor 291 and voltage across the resistor 286 inthe output of the emitter of the transistor 287. While pulse C, showngraphically at V of FIGURE 4, was present, these voltages were equal butnow they have become unequal by the amount of the amplified sarnpledsignal pulse. The reason for this is that passage of the signal samplingpulse C allows the voltage across resistor 286 to change back to itsquiescent val-ue lwhile rate feedback so as to complete the rate loop14.

Preamplier and adder network The present invention is directed to thenovel preamplifier network 16 including the adder network 34 which maybe used in the heretofore described control system.

In the aforenoted system, the conductor 37 leading from the D.C. SignalSource 35 is connected to a resistor 301 in the adder network 34 andthrough a conductor 303 to a base 305 of an NPN type transistor 45having a collector 307 and emitter 308. The collector 307 is connectedthrough a conductor 309, resistor 311 and conductor 313 to a cathodeelement 315 of a diode 317 having an anode element 319. A resistor 320is connected between the base 305 and collector 307.

The anode element 319 of the diode 317 is connected through a conductor321 to the conductor 75 leading from the positive terminal of thebattery 74 having a negative terminal connected to ground. A filtercapacitor 323 has one plate connected to the conductor 313 and anopposite plate connected to ground. The emitter 308 of the transistor 45is connected by a conductor 325 to the conductor 79 leading throughconductor 203 to a common ground.

A resistor 327 has one end connected by a conductor 329 to the conductor303 and an opposite end connected by a conductor 331 to a conductor 333leading to an anode element 335 of a diode 337 having a cathode element339 connected through the conductor to the negative terminal of thebattery 164 having the positive terminal thereof connected by theconductor 166 to ground. A filter capacitor 340 has one plate connectedto the conductor 333 and an opposite plate connected to ground. Theoutput conductor 49 is connected to the conductor 309 leading to thecollector 307 of the transistor 45.

A second resistor 342 in the adder network 34 is connected at one end tothe conductor 37 leading from the D.C. Signal Source 35 and at anopposite end connected through a conductor 343 to a base 345 of an NPNtype transistor 43 having a collector 347 and emitter 348. The collector347 is connected through a conductor 349, resistor 351 and conductor 353to the conductor 313 leading through diode 317 and conductor 321 to thepositive terminal of the battery 74 -while the emitter 348 of thetransistor 43 is connected by a conductor 355 to the conductor 79leading through the conductor 203 to the common ground.

A resistor 357 has one end connected by a conductor 359 to the conductor343 and an opposite end connected to the conductor 333 leading to theanode element 335 of the diode 337 and there through to the conductor165 and negative terminal of the battery 164.

A resistor 360 is connected between the base 345 and collector 347 ofthe transistor 43 while an output from the collector 347 is connectedthrough the resistor 46 leading from the conductor 349 to a conductor363 leading to a base 365 of an NPN type transistor 47 having acollector 367 and an emitter 368.

The collector 367 is connected through a conductor 369, resistor 371 andconductor 353 to the conductor 313 leading through diode 317 andconductor 321 to the positive terminal of the battery 74 while theemitter 368 of the transistor 47 is connected by a conductor 373 to theconductor 79 leading through conductor 203 to the common ground.

A resistor 377 has one end connected to the conductor 363 and anopposite end connected to the conductor 333 leading to the anode element335 of the diode 337 and there through to the conductor 165 and negativeterminal of the battery 164. The output conductor 51 is connected to theconductor 369 leading to the collector 367 of the transistor 47. Aresistor 378 is connected between the base 365 and collector 367 of thetransistor 47.

A third resistor 380l of the adder network 34 is connected at one end tothe conductor 41 leading from the output of the rate hold network 32, asheretofore explained, while the opposite end of the resistor 380 isconnected by a conductor 382 to the conductor 303 leading to the base305 of the transistor 45. A fourth resistor 385 of the adder network 34is connected at one end to the conductor 41 While the opposite end ofthe resistor 385 is connected by a conductor 387 to the conductor 343leading to the base 345 of the transistor 43.

The direct current signal applied at the output of the rate hold network32 and through the conductor 41 and resistors 380 and 385 of the addernetwork 34 will be of a polarity acting in opposition to the polarity ofthe direct current command signal applied by the source 35 through theconductor 37 and resistors 301 and 342 of the adder network 34 so thatthe algebraic sum of the command and rate feedback signals will beapplied at the input conductors 303 and 387 as an error signal of apolarity corresponding to that of the command signal in which the ratefeedback signal will provide a damping effect on the controlling commandsignal.

The base 305 of the transistor 45, the base 345 of the transistor 43,and the base 365 of the transistor 47 will all be initially biased in anegative sense through resistors 327, 357 and 377, respectively, anddiode 337 leading to the negative terminal of the battery 164 so thatupon the input command signal being at a zero potential, theconductivity of the transistor 45 and the transistor 47 controlled bythe transistor 43 in response to such negative bias will be at a valuesuch that equal positive signal voltages will be applied at thecollector outputs 49 and 51 of the respective transistors 45 and 47 fromthe positive terminal of the battery 74.

However, upon a direct current signal having a positive polarity beingapplied from the signal source 35 to the conductor 37 and throughresistor 301 to the base 305 of the transistor 45, the base 305 will bebiased in a positive sense so as to increase the conductivity of thetransistor 45 whereupon there will be effected a decrease in thepositive signal voltage applied at the output conductor 49 from thepositive terminal of the battery 74 through conductor 313 and resistor311.

Simultaneously, the positive direct current signal voltage applied atthe base 345 of the transistor 43 through conductor 37 and resistor 342will increase the conductivity of the transistor 43 causing in turn thepositive bias applied through the coupling resistor 46 to the base 365of the transistor 47 to be decreased. This will in turn effect adecrease in the current flow through the transistor 47 resulting in aneffective increase in the positive signal voltage applied at the outputconductor 51 from the positive terminal of the battery 74 throughconductors 313, 353 and resistor 371.

Conversely upon .a negative direct current signal being applied from thesignal source 35 to the conductor 37 and thereby through resistor 301 tothe base 305 of the transistor 45, the negative bias initially appliedto the base 305 from the battery 164 will be effectively increased todecrease the conductivity of the transistor 45 and effect an increase inthe postiive signal voltage applied at the output conductor 49.

Simultaneously, the transistor 43 in response to the negative directcurrent signal voltage applied through conductor 37 and resistor 342 tothe base 345 thereof will cause in turn an increase in the positive biasapplied through the coupling resistor 46 to the base 365 of thetransistor 47 to increase the conductivity of the transistor 47 and inturn decrease the positive signal voltage applied at the outputconductor 51.

The command signal voltage thus applied through the conductor 37 will bein turn opposed by the followup or rate feedback voltage applied throughconductor 41 and resistors 380 and 385 of the adder network 34, asheretofore explained. The feedback voltage will be of an amplitudesomewhat less than the command signal Voltage and of an oppositepolarity so that upon the feedback voltage ybeing algebraically summedat the adder network 34 with the command voltage there will be effecteda resultant differential or error signal voltage for controlling therelative positive signal voltages applied at the output conductors 49and 51 of the preamplifier network 16 to effect two output signals atthe conductors 49 and 51 of an opposite phase relation in response tothe command signal voltage at conductor 37. Thus, the voltage at oneoutput conductor (49 or 51) will be greater than the voltage at theother output conductor (49 or 51) dependent upon the polarity of thecommand signal voltage applied at the conductor 37 to control theoperation of the direct current motor 12, as heretofore explained.

Although only one embodiment of the invention has been illustrated anddescribed, various changes in the form and relative arrangement of theparts, which will now appear to those skilled in the art, may be madewithout departing from the scope of the invention. Reference is,therefore, to be had to the appended claims for a definition of thelimits of the invention.

What is claimed is:

1. In a control system of a type including a variable speed reversibleelectric motor, and a load winding for controlling direction and speedof rotation of the motor, said control system including a forward loopnetwork for supplying direct current pulses for energizing the loadwinding, a direct current signal source for supplying a command voltageof variable amplitude to control the forward loop network, and afeedback network for applying a direct current voltage of an amplitudeproportional to the speed of rotation of the motor and of a polaritydependent upon the direction of rotation of the motor; wherein theimprovement comprises a first input channel, a second input channel,said source of direct current signal voltage having a pair of outputs ofopposite and selectively reversible polarity, said first and secondinput channels being both connected to one of said outputs of the sourceof direct current signal voltage, the first input channel including afirst current flow control device having a rst voltage output conductor,the second input channel including a second current flow control deviceand a third current flow control device, the third current flow controldevice having a second voltage output conductor, the third current flowcontrol device being operatively controlled by the second currentcontrol device, summing means in the first and second input channels foralgebraically summing the voltages from said direct current signalsource and said feedback network so as to effect a resultantdifferential voltage in each of said rst and second input channels, thefirst current flow control device being responsive to the amplitude andpolarity of the resultant differential voltage in the rst channel tomodify the voltage in the first output conductor in one sense, and thesecond current flow control device being responsive to the amplitude andpolarity of the resultant differential voltage in the second channel tooperatively control the third current flow control device so .as tomodify the output voltage in the second output conductor in an oppositesense.

2. The combination defined by claim 1 including voltage biasing meansfor effecting, an equal voltage output at l the first and secondconductors upon a resultant zero differential voltage being applied tothe first and second input channels through said summing means.

3. For use in a control system of a type including a variable speedreversible electric motor, and a load winding for controlling directionand sped of rotation of the motor, said control system including aforward loop network for supplying direct current pulses for energizingthe load winding, a direct current signal source `for supplying acommand voltage of variable amplitude and reversible polarity to controlthe forward loop network, and a feedback network for applying a directcurrent voltage of an amplitude proportional to the speed of rotation ofthe motor and of a polarity dependent upon the direction of rotation ofthe motor; the improvement comprising dual summing means for combiningthe feedback and command voltages, a preamplifier, the preamplifierincluding a pair of output conductors, a first source of electricalenergy, a first variable current flow control device operativelyconnected between the first source of electrical energy and one of saidoutput conductors, a second variable current flow control deviceoperatively connected between said first source and the other of saidoutput conductors, each of said first and second control devicesincluding a current control element, a second source of `electricalenergy for biasing the current control element of each of said controldevices in a sense to effect an equal flow of current through said firstand second control devices from said first source of electrical energyto said pair of output conductors upon said direct current signal sourcesupplying a zero voltage, and the dual summing means algebraicallysumming the voltages from said direct current signal source and saidfeedback network so as to effect a pair of resultant differentialvoltages, means to apply one of said resultant differential voltages tothe current control element of said first control device, and othermeans to apply the other of said resultant differential voltages to thecurrent control element of said second control device so as to effect arelatively greater voltage at one output conductor and a relativelylesser voltage at the other output conductor dependent upon the polarityand amplitude of the pair of resultant differential voltages. y

4. The improvement defined by claim 3 in which the first current liowcontrol device includes a transistor having a base element, emitterelement and collector element, the collector and emitter' elements beingconnected to the first source of electrical energy, means for connectingthe base and emitter elements to the second source of electrical energy,and other means for connecting the base and emitter elements to said oneresultant differential voltage of the dual summing means; the secondcurrent con trol device including first and second transistors eachhaving a base element, emitter element and collector element, theemitter and collector elements of both the first and second transistorsof the second control device being connected to the first source ofelectrical energy and the base and collector elements of both ofthefirst and second transistors of the second control device beingconnected to the second source of electrical energy, the firsttransistor of the second control device having base and collectorelements connected to said other resultant differential Voltage of thesumming means, the second transsistor of the second control devicehaving base and collector elements connected to an output of the firsttransistor of the second control device, and one of the outputconductors leading from the collector element of the transistor of thefirst control device and the other of said output conductors leadingfrom the collector element of the second transistor of the secondcontrol device.

References Cited UNITED STATES PATENTS ORIS L. RADER, Prz'mmy Examiner.THOMAS E. LYNCH, Assistant Examiner.

